;	[]==========================================================[]
;
;	    This source code is classified as confidential and 
;	    contains trade secrets owned by Award Software, Inc.
;
;	    		Copyright 1984, 1997
;			Award Software, Inc.
;			All rights reserved.
;
; 	[]==========================================================[]

;----------------------------------------------------------------------------
;Rev	Date	 Name	Description
;----------------------------------------------------------------------------
;R05    10/28/98 DNL	Added APIC plamform MP support for NT 5.0
;R04    02/19/98 DNL	Add simple boot spec. v0.99b support
;R03  	11/04/97 PAL 	Remove ACPI_ENABLE,ACPI_DISABLE & S4BIOS_REQ to acpi_ct.inc
;R02    05/07/97 ATT	Update ver for ACPI
;R01    05/03/97 DNL	Fixed the ACPI table formate conflict with ACPI spec 1.0
;R00	123096   ATT	Chipset independent equates for ACPI.ASM and ACPITBL.ASM
;----------------------------------------------------------------------------

;Core EQUs for ACPI.ASM
;
ACPISearchStart	EQU	40000h		;Where the ACPI tables CBROMed at.
					;If don't know, use 30000h so we search
					;from lowest range.  If you know where
					;ACPI tables are combined at, enter it here
					;to shorten the search time.	
ACPISearchEnd	EQU	0a0000h	    	;Search limit. This value shouldn't be changed.
ACPISeg		EQU	0f0000h		;"F000" base segment address of RSD PTR

;ACPI spec.v1.0 EQUs used by ACPI.ASM (change to spec.)
;
;FACSOffset	EQU	36		;Offset of FACS entry in FACP table
;DSDTOffset	EQU	40		;Offset of DSDT entry in FACP table
;FACPOffset	EQU	36		;Offset of FACP entry in RSDT table
;R01 FACSOffset	EQU	28		;Offset of FACS entry in FACP table
;R01 DSDTOffset	EQU	32		;Offset of DSDT entry in FACP table
;R01 FACPOffset	EQU	28		;Offset of FACP entry in RSDT table
FACSOffset	EQU	36		;R01 Offset of FACS entry in FACP table
DSDTOffset	EQU	40		;R01 Offset of DSDT entry in FACP table
FACPOffset	EQU	36		;R01 Offset of FACP entry in RSDT table
Now_Point	=	FACPOffset	;R04
ifdef	SIMPLE_BOOT_SUPPORT		;R04
Now_Point	=	Now_Point + 4	;R04
BOOTOffset	=	Now_Point	;R04
endif	;SIMPLE_BOOT_SUPPORT		;R04
ifdef	MP_SUPPORT			;R05
Now_Point	=	Now_Point + 4	;R05
APICOffset	=	Now_Point	;R05
endif	;MP_SUPPORT			;R05
ChksumOffset	EQU	9		;Offset of checksum byte in ACPI tables
RSDPTRChksumOffset	EQU	8	;Offset of RSD_PTR checksum byte	
LengthOffset	EQU	4		;Offset of ACPI table length
SCI_EN		EQU	1		;SCI_EN is bit 0 on PM1a_CNT_BLK register
SLP_TYPE_MASK	EQU	1ch		;Mask for SLP_TYP bits in PM1a_CNT_BLK
WakingVector	EQU	12		;Offset of firmware waking vector in FACS table	
;FACP Flag
;
WBINVDFlag	EQU	1
WBINVD_FLUSH	EQU	2
PROC_C1		EQU	4
P_LVL2_UP	EQU	8
PWR_BUTTON	EQU	10h
;R02 FIX_RTC		EQU	20h
;R02 TMR_VAL_EXT	EQU	40h
SLP_BUTTON	EQU	20h		;R02 
FIX_RTC		EQU	40h		;R02 
RTC_S4		EQU	80h		;R02 
TMR_VAL_EXT	EQU	100h		;R02 


;Fix EQUs for FACP table in ACPITPL.ASM.  These are chip set independent.
;
;R03					;These values are read from SMI_CMD
;R03					;by SMI handler to enable/disable ACPI.
;R03ACPI_ENABLE	EQU	0a1h		;Value assigned by BIOS to check at software
;R03					;SMI handler to disable SMI and enable SCI.		
;R03ACPI_DISABLE	EQU	0a0h		;Value to enable SMI ownership
;R03;S4BIOS_REQ	EQU	0a4h		;Value to enter S4 state (handle by BIOS)
;R03S4BIOS_REQ	EQU	00h		;Value to enter S4 state (handle by BIOS)
;R03					;0= Not support S4 state.
;R03					;0a4h= Support S4 sate. 
;R02 DAY_ALRM	EQU	0		;Index of RTC CMOS day alarm
;R02 MON_ALRM	EQU	0 		;Index of RTC CMOS month alarm
;R02 CENTURY_ALRM	EQU	0		;Index of RTC CMOS year alarm